Running sparse and low-precision neural network: When algorithm meets hardware
Publication
, Conference
Li, B; Wen, W; Mao, J; Li, S; Chen, Y; Li, HH
Published in: Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC
February 20, 2018
Deep Neural Networks (DNNs) are pervasively applied in many artificial intelligence (AI) applications. The high performance of DNNs comes at the cost of larger size and higher compute complexity. Recent studies show that DNNs have much redundancy, such as the zero-value parameters and excessive numerical precision. To reduce computing complexity, many redundancy reduction techniques have been proposed, including pruning and data quantization. In this paper, we demonstrate our co-optimization of the DNN algorithm and hardware which exploits the model redundancy to accelerate DNNs.
Duke Scholars
Published In
Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC
DOI
Publication Date
February 20, 2018
Volume
2018-January
Start / End Page
534 / 539
Citation
APA
Chicago
ICMJE
MLA
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Li, B., Wen, W., Mao, J., Li, S., Chen, Y., & Li, H. H. (2018). Running sparse and low-precision neural network: When algorithm meets hardware. In Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC (Vol. 2018-January, pp. 534–539). https://doi.org/10.1109/ASPDAC.2018.8297378
Li, B., W. Wen, J. Mao, S. Li, Y. Chen, and H. H. Li. “Running sparse and low-precision neural network: When algorithm meets hardware.” In Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC, 2018-January:534–39, 2018. https://doi.org/10.1109/ASPDAC.2018.8297378.
Li B, Wen W, Mao J, Li S, Chen Y, Li HH. Running sparse and low-precision neural network: When algorithm meets hardware. In: Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC. 2018. p. 534–9.
Li, B., et al. “Running sparse and low-precision neural network: When algorithm meets hardware.” Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC, vol. 2018-January, 2018, pp. 534–39. Scopus, doi:10.1109/ASPDAC.2018.8297378.
Li B, Wen W, Mao J, Li S, Chen Y, Li HH. Running sparse and low-precision neural network: When algorithm meets hardware. Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC. 2018. p. 534–539.
Published In
Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC
DOI
Publication Date
February 20, 2018
Volume
2018-January
Start / End Page
534 / 539