Design and Data Management for Magnetic Racetrack Memory
Publication
, Conference
Li, B; Chen, F; Kang, W; Zhao, W; Chen, Y; Li, H
Published in: Proceedings - IEEE International Symposium on Circuits and Systems
April 26, 2018
Benefiting from its ultra-high storage density, high energy efficiency, and non-volatility, racetrack memory demonstrates great potential in replacing conventional SRAM as large on-chip memory. Integrating the tape-like racetrack memory, however, faces unique design challenges from cell structure to architecture design. This paper reviews some cross-layer design methodologies for racetrack memory as on-chip cache hierarchy. Research studies show that with proper architectural design and data management, racetrack memory can achieve significant area reduction, system performance enhancement, and energy saving compared to state-of-the-art memory technologies.
Duke Scholars
Published In
Proceedings - IEEE International Symposium on Circuits and Systems
DOI
ISSN
0271-4310
Publication Date
April 26, 2018
Volume
2018-May
Citation
APA
Chicago
ICMJE
MLA
NLM
Li, B., Chen, F., Kang, W., Zhao, W., Chen, Y., & Li, H. (2018). Design and Data Management for Magnetic Racetrack Memory. In Proceedings - IEEE International Symposium on Circuits and Systems (Vol. 2018-May). https://doi.org/10.1109/ISCAS.2018.8351681
Li, B., F. Chen, W. Kang, W. Zhao, Y. Chen, and H. Li. “Design and Data Management for Magnetic Racetrack Memory.” In Proceedings - IEEE International Symposium on Circuits and Systems, Vol. 2018-May, 2018. https://doi.org/10.1109/ISCAS.2018.8351681.
Li B, Chen F, Kang W, Zhao W, Chen Y, Li H. Design and Data Management for Magnetic Racetrack Memory. In: Proceedings - IEEE International Symposium on Circuits and Systems. 2018.
Li, B., et al. “Design and Data Management for Magnetic Racetrack Memory.” Proceedings - IEEE International Symposium on Circuits and Systems, vol. 2018-May, 2018. Scopus, doi:10.1109/ISCAS.2018.8351681.
Li B, Chen F, Kang W, Zhao W, Chen Y, Li H. Design and Data Management for Magnetic Racetrack Memory. Proceedings - IEEE International Symposium on Circuits and Systems. 2018.
Published In
Proceedings - IEEE International Symposium on Circuits and Systems
DOI
ISSN
0271-4310
Publication Date
April 26, 2018
Volume
2018-May