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Fractal Coherence: Scalably verifiable cache coherence

Publication ,  Conference
Zhang, M; Lebeck, AR; Sorin, DJ
Published in: Proceedings of the Annual International Symposium on Microarchitecture, MICRO
December 1, 2010

We propose an architectural design methodology for designing formally verifiable cache coherence protocols, called Fractal Coherence. Properly designed to be fractal in behavior, the proposed family of cache coherence protocols can be formally verified correct for systems with an arbitrary number of cores, using existing, automated formal tools. We show, by designing and implementing a specific Fractal Coherence protocol, called TreeFractal, that Fractal Coherence protocols can attain comparable performance to traditional snooping and directory protocols. © 2010 IEEE.

Duke Scholars

Published In

Proceedings of the Annual International Symposium on Microarchitecture, MICRO

DOI

ISSN

1072-4451

ISBN

9780769542997

Publication Date

December 1, 2010

Start / End Page

471 / 482
 

Citation

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Zhang, M., Lebeck, A. R., & Sorin, D. J. (2010). Fractal Coherence: Scalably verifiable cache coherence. In Proceedings of the Annual International Symposium on Microarchitecture, MICRO (pp. 471–482). https://doi.org/10.1109/MICRO.2010.11
Zhang, M., A. R. Lebeck, and D. J. Sorin. “Fractal Coherence: Scalably verifiable cache coherence.” In Proceedings of the Annual International Symposium on Microarchitecture, MICRO, 471–82, 2010. https://doi.org/10.1109/MICRO.2010.11.
Zhang M, Lebeck AR, Sorin DJ. Fractal Coherence: Scalably verifiable cache coherence. In: Proceedings of the Annual International Symposium on Microarchitecture, MICRO. 2010. p. 471–82.
Zhang, M., et al. “Fractal Coherence: Scalably verifiable cache coherence.” Proceedings of the Annual International Symposium on Microarchitecture, MICRO, 2010, pp. 471–82. Scopus, doi:10.1109/MICRO.2010.11.
Zhang M, Lebeck AR, Sorin DJ. Fractal Coherence: Scalably verifiable cache coherence. Proceedings of the Annual International Symposium on Microarchitecture, MICRO. 2010. p. 471–482.

Published In

Proceedings of the Annual International Symposium on Microarchitecture, MICRO

DOI

ISSN

1072-4451

ISBN

9780769542997

Publication Date

December 1, 2010

Start / End Page

471 / 482