Scholars@Duke

• Background
• 

  Education, Training, & Certifications

  • Ph.D., University of Pennsylvania 2010
• 

  Duke Appointment History

  • Assistant Professor of the Practice in the Department of Electrical and Computer Engineering, Electrical and Computer Engineering, Pratt School of Engineering 2012 - 2017
  • Adjunct Instructor in the Department of Computer Science, Computer Science, Trinity College of Arts & Sciences 2011 - 2012
• Recognition
• 

  In the News

  • OCT 15, 2015

    Pratt-Honored Professor on Teaching Programming Before Coding in the Classroom
• Research
• 

  Selected Grants

  • SHF: Small: Game-Theoretic Foundations for Task Co-Location awarded by  National Science Foundation 2015 - 2018
• Publications & Artistic Works
• 

  Selected Publications

  • Conference Papers

    • Jacobvitz, AN, Hilton, AD, and Sorin, DJ. "Multi-program benchmark definition." January 1, 2015.  Full Text  Open Access Copy
    • Battle, S, Hilton, AD, Hempstead, M, and Roth, A. "Flexible register management using reference counting." 2012.  Full Text  Open Access Copy
    • Hilton, A, and Roth, A. "BOLT: Energy-efficient out-of-order latency-tolerant execution." 2010.  Open Access Copy
    • Hilton, A, Eswaran, N, and Roth, A. "CPROB: Checkpoint processing with opportunistic minimal recovery." 2009.  Full Text  Open Access Copy
    • Hilton, A, Nagarakatte, S, and Roth, A. "Icfp: tolerating all-level cache misses in in-order processors." 2009.  Full Text  Open Access Copy
    • Hilton, A, and Roth, A. "Decoupled store completion/silent deterministic replay: Enabling scalable data memory for CPR/CFP processors." 2009.  Full Text  Open Access Copy
    • Hilton, AD, and Roth, A. "Ginger: Control independence using tag rewriting." 2007.  Full Text  Open Access Copy
    • Abbasi, H, Wolf, M, Schwan, K, Eisenhauer, G, and Hilton, A. "XChange: Coupling parallel applications in a dynamic environment." 2004.  Full Text

  • Journal Articles

    • Hilton, A, Nagarakatte, S, and Roth, A. "ICFP: Tolerating all-level cache misses in in-order processors." IEEE Micro 30, no. 1 (2010): 12-19.  Full Text  Open Access Copy
    • Hilton, A, and Roth, A. "SMT-directory: Efficient load-load ordering for SMT." IEEE Computer Architecture Letters 9, no. 1 (2010): 25-28.  Full Text
    • Battle, S, Hilton, AD, Hempstead, M, and Roth, A. ""Flexible register management using reference counting."." : 273-284.

  • Other Articles

    • Lehman, TS, Hilton, AD, and Lee, BC. "PoisonIvy: Safe speculation for secure memory." Proceedings of the Annual International Symposium on Microarchitecture, MICRO 2016-December (December 14, 2016).  Full Text  Open Access Copy
    • Huang, Z, Hilton, AD, and Lee, BC. "Decoupling Loads for Nano-Instruction Set Computers." Proceedings - 2016 43rd International Symposium on Computer Architecture, ISCA 2016 (August 24, 2016): 406-417.  Full Text  Open Access Copy
• Teaching & Mentoring
• 

  Recent Courses

  • COMPSCI 553: Compiler Construction 2018
  • ECE 494: Projects in Electrical and Computer Engineering 2018
  • ECE 551D: Programming, Data Structures, and Algorithms in C++ 2018
  • ECE 553: Compiler Construction 2018
  • ECE 590: Advanced Topics in Electrical and Computer Engineering 2018
  • ECE 891: Internship 2018
  • ECE 493: Projects in Electrical and Computer Engineering 2017
  • ECE 458: Engineering Software for Maintainability 2016
  • ECE 899: Special Readings in Electrical Engineering 2016

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