A practical low-power memristor-based analog neural branch predictor
Publication
, Conference
Wang, J; Tim, Y; Wong, WF; Li, HH
Published in: Proceedings of the International Symposium on Low Power Electronics and Design
December 11, 2013
Recently, the discovery of memristor brought the promise of high density, low energy, and combined memory/arithmetic capability into computing. This paper demonstrates a practical neural branch predictor based on memristor. By using analog computation techniques, as well as exploiting the accuracy tolerance of branch prediction, our design is able to efficiently realize a neural prediction algorithm. Compared to the digital counterpart, our method achieves significant energy reduction while maintaining a better prediction accuracy and a higher IPC. Our approach also reduces the resource and energy required by an alternative design. © 2013 IEEE.
Duke Scholars
Published In
Proceedings of the International Symposium on Low Power Electronics and Design
DOI
ISSN
1533-4678
Publication Date
December 11, 2013
Start / End Page
175 / 180
Citation
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MLA
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Wang, J., Tim, Y., Wong, W. F., & Li, H. H. (2013). A practical low-power memristor-based analog neural branch predictor. In Proceedings of the International Symposium on Low Power Electronics and Design (pp. 175–180). https://doi.org/10.1109/ISLPED.2013.6629290
Wang, J., Y. Tim, W. F. Wong, and H. H. Li. “A practical low-power memristor-based analog neural branch predictor.” In Proceedings of the International Symposium on Low Power Electronics and Design, 175–80, 2013. https://doi.org/10.1109/ISLPED.2013.6629290.
Wang J, Tim Y, Wong WF, Li HH. A practical low-power memristor-based analog neural branch predictor. In: Proceedings of the International Symposium on Low Power Electronics and Design. 2013. p. 175–80.
Wang, J., et al. “A practical low-power memristor-based analog neural branch predictor.” Proceedings of the International Symposium on Low Power Electronics and Design, 2013, pp. 175–80. Scopus, doi:10.1109/ISLPED.2013.6629290.
Wang J, Tim Y, Wong WF, Li HH. A practical low-power memristor-based analog neural branch predictor. Proceedings of the International Symposium on Low Power Electronics and Design. 2013. p. 175–180.
Published In
Proceedings of the International Symposium on Low Power Electronics and Design
DOI
ISSN
1533-4678
Publication Date
December 11, 2013
Start / End Page
175 / 180