Skip to main content

A novel architecture of the 3D stacked MRAM L2 Cache for CMPs

Publication ,  Conference
Sun, G; Dong, X; Xie, Y; Li, J; Chen, Y
Published in: Proceedings - International Symposium on High-Performance Computer Architecture
January 1, 2009

Magnetic random access memory (MRAM) is a promising memory technology, which has fast read access, high density, and non-volatility. Using 3D heterogeneous integrations, it becomes feasible and cost-efficient to stack MRAM atop conventional chip multiprocessors (CMPs). However, one disadvantage of MRAM is its long write latency and its high write energy. In this paper, we first stackMRAM-based L2 caches directly atop CMPs and compare it against SRAM counterparts in terms of performance and energy. We observe that the direct MRAM stacking might harm the chip performance due to the aforementioned long write latency and high write energy. To solve this problem, we then propose two architectural techniques: read-preemptive write buffer and SRAM-MRAM hybrid L2 cache. The simulation result shows that our optimized MRAM L2 cache improves performance by 4.91% and reduces power by 73.5%compared to the conventional SRAM L2 cache with the similar area. © 2008 IEEE.

Duke Scholars

Published In

Proceedings - International Symposium on High-Performance Computer Architecture

DOI

ISSN

1530-0897

Publication Date

January 1, 2009

Start / End Page

239 / 249
 

Citation

APA
Chicago
ICMJE
MLA
NLM
Sun, G., Dong, X., Xie, Y., Li, J., & Chen, Y. (2009). A novel architecture of the 3D stacked MRAM L2 Cache for CMPs. In Proceedings - International Symposium on High-Performance Computer Architecture (pp. 239–249). https://doi.org/10.1109/HPCA.2009.4798259
Sun, G., X. Dong, Y. Xie, J. Li, and Y. Chen. “A novel architecture of the 3D stacked MRAM L2 Cache for CMPs.” In Proceedings - International Symposium on High-Performance Computer Architecture, 239–49, 2009. https://doi.org/10.1109/HPCA.2009.4798259.
Sun G, Dong X, Xie Y, Li J, Chen Y. A novel architecture of the 3D stacked MRAM L2 Cache for CMPs. In: Proceedings - International Symposium on High-Performance Computer Architecture. 2009. p. 239–49.
Sun, G., et al. “A novel architecture of the 3D stacked MRAM L2 Cache for CMPs.” Proceedings - International Symposium on High-Performance Computer Architecture, 2009, pp. 239–49. Scopus, doi:10.1109/HPCA.2009.4798259.
Sun G, Dong X, Xie Y, Li J, Chen Y. A novel architecture of the 3D stacked MRAM L2 Cache for CMPs. Proceedings - International Symposium on High-Performance Computer Architecture. 2009. p. 239–249.

Published In

Proceedings - International Symposium on High-Performance Computer Architecture

DOI

ISSN

1530-0897

Publication Date

January 1, 2009

Start / End Page

239 / 249