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Efficient bit error rate estimation for high-speed link by Bayesian model fusion

Publication ,  Conference
Fang, C; Huang, Q; Yang, F; Zeng, X; Li, X; Gu, C
Published in: Proceedings -Design, Automation and Test in Europe, DATE
April 22, 2015

High-speed I/O link is an important component in computer systems, and estimating its bit error rate (BER) is a critical task to guarantee its performance. In this paper, we propose an efficient method to estimate BER by Bayesian Model Fusion. Its key idea is to borrow conventional extrapolated BER value as prior knowledge, and combine it with additional measurement data to 'calibrate' the BER value. This method can be viewed as an application of Bayesian Model Fusion (BMF) technique. We further propose some novel methodologies to make BMF applicable in the BER estimation case. In this way, we can sufficiently decrease the number of bits needed to estimate BER value. Several experiments demonstrate that our proposed method achieves up to 8x speed-up over direct estimation method.

Duke Scholars

Published In

Proceedings -Design, Automation and Test in Europe, DATE

DOI

ISSN

1530-1591

Publication Date

April 22, 2015

Volume

2015-April

Start / End Page

1024 / 1029
 

Citation

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Fang, C., Huang, Q., Yang, F., Zeng, X., Li, X., & Gu, C. (2015). Efficient bit error rate estimation for high-speed link by Bayesian model fusion. In Proceedings -Design, Automation and Test in Europe, DATE (Vol. 2015-April, pp. 1024–1029). https://doi.org/10.7873/date.2015.0025
Fang, C., Q. Huang, F. Yang, X. Zeng, X. Li, and C. Gu. “Efficient bit error rate estimation for high-speed link by Bayesian model fusion.” In Proceedings -Design, Automation and Test in Europe, DATE, 2015-April:1024–29, 2015. https://doi.org/10.7873/date.2015.0025.
Fang C, Huang Q, Yang F, Zeng X, Li X, Gu C. Efficient bit error rate estimation for high-speed link by Bayesian model fusion. In: Proceedings -Design, Automation and Test in Europe, DATE. 2015. p. 1024–9.
Fang, C., et al. “Efficient bit error rate estimation for high-speed link by Bayesian model fusion.” Proceedings -Design, Automation and Test in Europe, DATE, vol. 2015-April, 2015, pp. 1024–29. Scopus, doi:10.7873/date.2015.0025.
Fang C, Huang Q, Yang F, Zeng X, Li X, Gu C. Efficient bit error rate estimation for high-speed link by Bayesian model fusion. Proceedings -Design, Automation and Test in Europe, DATE. 2015. p. 1024–1029.

Published In

Proceedings -Design, Automation and Test in Europe, DATE

DOI

ISSN

1530-1591

Publication Date

April 22, 2015

Volume

2015-April

Start / End Page

1024 / 1029