Mismatch analysis and statistical design at 65 nm and below
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, Conference
Pileggi, L; Keskin, G; Li, X; Mai, K; Proesel, J
Published in: Proceedings of the Custom Integrated Circuits Conference
December 26, 2008
Transistor sizing to control random mismatch is investigated. Input offset voltage of 65nm bulk CMOS SRAM sense amplifiers are measured to analyze NMOS and PMOS threshold voltage (Vtn, Vtp) variation effects and compare them with statistical models and Pelgrom model predictions. A linear statistical response surface model (RSM) relating input offset to Vtn and Vtp is shown to agree well with measured results. Designs optimized using the RSMs produce circuits with 25% lower input offset voltage spread at a cost of 10% more active device area. Statistical models for post-manufacturing configuration are postulated and shown for sub-65nm technologies. © 2008 IEEE.
Duke Scholars
Published In
Proceedings of the Custom Integrated Circuits Conference
DOI
ISSN
0886-5930
Publication Date
December 26, 2008
Start / End Page
9 / 12
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Pileggi, L., Keskin, G., Li, X., Mai, K., & Proesel, J. (2008). Mismatch analysis and statistical design at 65 nm and below. In Proceedings of the Custom Integrated Circuits Conference (pp. 9–12). https://doi.org/10.1109/CICC.2008.4672006
Pileggi, L., G. Keskin, X. Li, K. Mai, and J. Proesel. “Mismatch analysis and statistical design at 65 nm and below.” In Proceedings of the Custom Integrated Circuits Conference, 9–12, 2008. https://doi.org/10.1109/CICC.2008.4672006.
Pileggi L, Keskin G, Li X, Mai K, Proesel J. Mismatch analysis and statistical design at 65 nm and below. In: Proceedings of the Custom Integrated Circuits Conference. 2008. p. 9–12.
Pileggi, L., et al. “Mismatch analysis and statistical design at 65 nm and below.” Proceedings of the Custom Integrated Circuits Conference, 2008, pp. 9–12. Scopus, doi:10.1109/CICC.2008.4672006.
Pileggi L, Keskin G, Li X, Mai K, Proesel J. Mismatch analysis and statistical design at 65 nm and below. Proceedings of the Custom Integrated Circuits Conference. 2008. p. 9–12.
Published In
Proceedings of the Custom Integrated Circuits Conference
DOI
ISSN
0886-5930
Publication Date
December 26, 2008
Start / End Page
9 / 12