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Efficient Memory Integration: MRAM-SRAM Hybrid Accelerator for Sparse On-Device Learning

Publication ,  Conference
Zhang, F; Sridharan, A; Tsai, W; Chen, Y; Wang, SX; Fan, D
Published in: Proceedings - Design Automation Conference
November 7, 2024

With the prosperous development of Deep Neural Network (DNNs), numerous Process-In-Memory (PIM) designs have emerged to accelerate DNN models with exceptional throughput and energy-efficiency. PIM accelerators based on Non-Volatile Memory (NVM) or volatile memory offer distinct advantages for computational efficiency and performance. NVM based PIM accelerators, demonstrated success in DNN inference, face limitations in on-device learning due to high write energy, latency, and instability. Conversely, fast volatile memories, like SRAM, offer rapid read/write operations for DNN training, but suffer from significant leakage currents and large memory footprints. In this paper, for the first time, we present a fully-digital sparse processing in hybrid NVM-SRAM design, synergistically combines the strengths of NVM and SRAM, tailored for on-device continual learning. Our designed NVM and SRAM based PIM circuit macros could support both storage and processing of N:M structured sparsity pattern, significantly improving the storage and computing efficiency. Exhaustive experiments demonstrate that our hybrid system effectively reduces area and power consumption while maintaining high accuracy, offering a scalable and versatile solution for on-device continual learning.

Duke Scholars

Published In

Proceedings - Design Automation Conference

DOI

ISSN

0738-100X

Publication Date

November 7, 2024
 

Citation

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Zhang, F., Sridharan, A., Tsai, W., Chen, Y., Wang, S. X., & Fan, D. (2024). Efficient Memory Integration: MRAM-SRAM Hybrid Accelerator for Sparse On-Device Learning. In Proceedings - Design Automation Conference. https://doi.org/10.1145/3649329.3657390
Zhang, F., A. Sridharan, W. Tsai, Y. Chen, S. X. Wang, and D. Fan. “Efficient Memory Integration: MRAM-SRAM Hybrid Accelerator for Sparse On-Device Learning.” In Proceedings - Design Automation Conference, 2024. https://doi.org/10.1145/3649329.3657390.
Zhang F, Sridharan A, Tsai W, Chen Y, Wang SX, Fan D. Efficient Memory Integration: MRAM-SRAM Hybrid Accelerator for Sparse On-Device Learning. In: Proceedings - Design Automation Conference. 2024.
Zhang, F., et al. “Efficient Memory Integration: MRAM-SRAM Hybrid Accelerator for Sparse On-Device Learning.” Proceedings - Design Automation Conference, 2024. Scopus, doi:10.1145/3649329.3657390.
Zhang F, Sridharan A, Tsai W, Chen Y, Wang SX, Fan D. Efficient Memory Integration: MRAM-SRAM Hybrid Accelerator for Sparse On-Device Learning. Proceedings - Design Automation Conference. 2024.

Published In

Proceedings - Design Automation Conference

DOI

ISSN

0738-100X

Publication Date

November 7, 2024