Rapid thermal annealing characteristics of bulk AlInAs/InP and AlInAs/GaInAs/InP high electron mobility transistor structures with planar silicon doping

The effects of high temperature rapid thermal annealing processes on carrier concentration and mobility of bulk AlInAs and AlInAs/GaInAs high electron mobility transistor structures with planar Si doping are studied. At annealing temperatures of 700°C and 800°C, slight reduction in mobilities and carrier concentration are observed in samples annealed with a Si3N4 cap or GaAs pieces in close proximity. The reduction in mobility is thought to be due to enhanced diffusion of the donor Si atoms towards the two-dimensional electron gas channel. Preferential vacancy enhanced diffusion of Si atoms towards the surface is projected to be responsible for the loss in carrier concentration. At these annealing temperatures, the reduction in mobility in the samples annealed with SiO2 capping is more pronounced, and is as high as 80% at the measurement temperature of 15 K. This behavior is attributed to the outdiffusion of Ga and In atoms into the oxide thereby creating vacancies and resulting in interface mixing. Reduction in mobility and carrier concentration are much more substantial in the 900°C anneals done with Si3N4 cap and GaAs pieces in close proximity. This indicates the destruction of the heterostructure integrity of the AlInAs/GaInAs interface. For the particular anneal with a SiO2 cap at this temperature, the carrier concentration increases above its reference value due to effective doping of the ternary material by the back-diffusing Si atoms from the SiO2 cap.

Duke Scholars

Author April S. Brown Electrical and Computer Engineering