On the effects of carrier tunneling on the capacitance-voltage characteristics of ultrathin-oxide MOSFETs
The combination of carrier tunneling and channel resistance in ultrathin-oxide metal-oxide-semiconductor field-effect transistors (MOSFETs) and the two-dimensional interaction of the source-channel and drain-channel transitions along the MOSFET channel result in laterally nonuniform distributions of carrier concentrations, electrostatic potential, and oxide tunneling current density. These distributions, obtained from MOSFET device simulations in MEDICI, depend on the channel length, oxide thickness, dopant concentrations in the substrate and gate regions, and the bias conditions. These distributions require that the capacitance-voltage C(V) characteristics of ultrathin-oxide MOSFETs be studied using a distributed model. The approach used to simulate the C(V) characteristics of ultrathin-oxide MOSFETs - that accounts for gate tunneling, device geometry, and parasitics - and their dependence on the device and operating parameters are presented.