A sequential implementation of optimal array processors
Publication
, Journal Article
Hodgkiss, WS; Nolte, LW
Published in: IEEE Trans. Aerosp. Electron. Syst. (USA)
1980
A sequential implementation of the likelihood ratio for doubly composite hypothesis array processing problems is presented in which the likelihood ratio is realized by an appropriate combination of single frequency components. The array processor is decomposed in such a way that the actual a priori parameter knowledge need not be introduced until after a significant portion of the data processing has taken place
Duke Scholars
Published In
IEEE Trans. Aerosp. Electron. Syst. (USA)
Publication Date
1980
Volume
AES-16
Issue
3
Start / End Page
349 / 354
Related Subject Headings
- Aerospace & Aeronautics
- 4009 Electronics, sensors and digital hardware
- 4006 Communications engineering
- 4001 Aerospace engineering
Citation
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ICMJE
MLA
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Hodgkiss, W. S., & Nolte, L. W. (1980). A sequential implementation of optimal array processors. IEEE Trans. Aerosp. Electron. Syst. (USA), AES-16(3), 349–354.
Hodgkiss, W. S., and L. W. Nolte. “A sequential implementation of optimal array processors.” IEEE Trans. Aerosp. Electron. Syst. (USA) AES-16, no. 3 (1980): 349–54.
Hodgkiss WS, Nolte LW. A sequential implementation of optimal array processors. IEEE Trans Aerosp Electron Syst (USA). 1980;AES-16(3):349–54.
Hodgkiss, W. S., and L. W. Nolte. “A sequential implementation of optimal array processors.” IEEE Trans. Aerosp. Electron. Syst. (USA), vol. AES-16, no. 3, 1980, pp. 349–54.
Hodgkiss WS, Nolte LW. A sequential implementation of optimal array processors. IEEE Trans Aerosp Electron Syst (USA). 1980;AES-16(3):349–354.
Published In
IEEE Trans. Aerosp. Electron. Syst. (USA)
Publication Date
1980
Volume
AES-16
Issue
3
Start / End Page
349 / 354
Related Subject Headings
- Aerospace & Aeronautics
- 4009 Electronics, sensors and digital hardware
- 4006 Communications engineering
- 4001 Aerospace engineering