History of some early developments in ion-implantation technology leading to silicon transistor manufacturing

Ion implantation of dopant impurities to form p-n junctions and other doped regions in silicon transistors has evolved from an experimental curiosity in solid-state physics to become a dominant technology in today's integrated circuit manufacturing. This paper traces the key inventions and early developments in ion beam doping concepts from the early 1950's through the 1970's as they were applied to the development of metal-oxide-semiconductor (MOS) and bipolar transistors. Early on, scientists were fascinated with possible applications of radiation damage resulting from ion bombardment of semiconductors for building novel devices with room-temperature processing or, at most, maximum heating temperatures of a few hundred degrees Celsius. As a result, the early work initially overlooked the real potential of the technology for providing a highly controlled means of substitutional impurity doping in combination with high temperature annealing above 800° C. Subsequently, a number of key researchers contributed to the knowledge base surrounding the penetration of energetic ions into semiconductors. However, the true potential of ion implantation would be realized by more device-oriented engineers driven by design and manufacturing issues who looked for ways of applying and integrating ion implantation with conventional transistor manufacturing methods. Ion implantation allowed for good lateral and vertical junction position control, which were critical elements as both device dimensions and patterned feature tolerances were reduced. Ion implantation, high-temperature annealing, and self-aligned silicon gate technology fueled new process technologies in MOS devices such as arsenic source/drain doping, the ability to tailor threshold voltages in both enhancement and depletion transistors, and lightly doped drain extensions. In bipolar technology, ion implantation would make possible tight control of base-region doping and reduction of parasitic resistances, and would enable the use of arsenic emitters for high-frequency applications of discrete transistors as well as advanced, high-speed integrated circuits. © 1998 IEEE.

Duke Scholars

Author Richard B. Fair Electrical and Computer Engineering