Point Defect Generation during Phosphorus Diffusion in Silicon I. Concentrations above Solid Solubility

The goal of the present research was to investigate the proposal that P diffusion at concentrations above solid solubility generates silicon self-interstitials. Buried layers of As and Sb were created by either implanting Sb at 150 keV, 5 x 1013 cm-2 or As at 100 keV, 1.0 x 1014 cm-2 in <100> Si substrates. After a 900°C, 30 min anneal in N2., an 8–10 pm thick epi layer was grown over the buried layers. Masking oxides were then created either by depositing a LPCVD SiO2 layer (1 μm) or by thermal oxidation at 900°C in steam. Spreading resistance profiles were taken on all samples. SIMS was used to characterize the chemical P doping densities. Plan view and cross-section TEM was used to look for SiP precipitates and defects in the P-diffused layers. Major results of this matrix of experiments are the following. 1. Phosphorus-related precipitates 0.1-0.2 μm in size were observed in selected samples using TEM. In all cases their concentration is insufficient to account for the concentration of nonelectrically active P. 2. Measurable enhanced diffusion of As in the buried layers occurred over the temperature range 1000°-1150°C with an activation energy of≈1.5 eV. This enhanced diffusion only occurred under the windows in which P was diffusing. 3. Measurable retarded diffusion of Sb in the buried layers occurred over the temperature range 1100°-1200°C with an activation energy of ≈6.6 eV. 4. Stacking fault growth in the buried As and Sb layers under the P-diffused region implies that a silicon self-interstitial supersaturation was produced in the P doped layer. Self-interstitials feed the stacking fault growth and the enhanced As diffusion and retarded Sb diffusion. 5. The level of self-interstitials generated cannot be accounted for by the sparse number of precipitates formed in the P-diffused region. © 1987, The Electrochemical Society, Inc. All rights reserved.

Duke Scholars

Author Richard B. Fair Electrical and Computer Engineering