MODELING PHYSICAL LIMITATIONS ON JUNCTION SCALING FOR CMOS.
Publication
, Journal Article
Fair, RB; Wortman, JJ; Liu, J; Tischler, M; Masnari, NA
Published in: IEEE Transactions on Electron Devices
1984
Accurate calculations of diffusion and ion-implantation processes in silicon require the utilization of complex steady-state physical models that include the effects of both vacancies and self-interstitials. A new one-dimensional computer program, PROSIM II, has been developed for use in experimental junction formation studies that impact on advanced MOS technologies. PROSIM II has been used to study the scaling limits of counter-doped junctions for CMOS using both conventional furnace annealing and rapid thermal annealing processes. It is found that double implants of boron and arsenic can be used to produce a minimum 3000-A-deep junction and still satisfy sheet resistance requirements for a 1- mu m process.
Duke Scholars
Published In
IEEE Transactions on Electron Devices
Publication Date
1984
Volume
ED-31
Issue
9
Start / End Page
1180 / 1185
Related Subject Headings
- Applied Physics
- 0906 Electrical and Electronic Engineering
Citation
APA
Chicago
ICMJE
MLA
NLM
Fair, R. B., Wortman, J. J., Liu, J., Tischler, M., & Masnari, N. A. (1984). MODELING PHYSICAL LIMITATIONS ON JUNCTION SCALING FOR CMOS. IEEE Transactions on Electron Devices, ED-31(9), 1180–1185.
Fair, R. B., J. J. Wortman, J. Liu, M. Tischler, and N. A. Masnari. “MODELING PHYSICAL LIMITATIONS ON JUNCTION SCALING FOR CMOS.” IEEE Transactions on Electron Devices ED-31, no. 9 (1984): 1180–85.
Fair RB, Wortman JJ, Liu J, Tischler M, Masnari NA. MODELING PHYSICAL LIMITATIONS ON JUNCTION SCALING FOR CMOS. IEEE Transactions on Electron Devices. 1984;ED-31(9):1180–5.
Fair, R. B., et al. “MODELING PHYSICAL LIMITATIONS ON JUNCTION SCALING FOR CMOS.” IEEE Transactions on Electron Devices, vol. ED-31, no. 9, 1984, pp. 1180–85.
Fair RB, Wortman JJ, Liu J, Tischler M, Masnari NA. MODELING PHYSICAL LIMITATIONS ON JUNCTION SCALING FOR CMOS. IEEE Transactions on Electron Devices. 1984;ED-31(9):1180–1185.
Published In
IEEE Transactions on Electron Devices
Publication Date
1984
Volume
ED-31
Issue
9
Start / End Page
1180 / 1185
Related Subject Headings
- Applied Physics
- 0906 Electrical and Electronic Engineering