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Flexible register management using reference counting

Publication ,  Conference
Battle, S; Hilton, AD; Hempstead, M; Roth, A
Published in: Proceedings - International Symposium on High-Performance Computer Architecture
May 3, 2012

Conventional out-of-order processors that use a unified physical register file allocate and reclaim registers explicitly using a free list that operates as a circular queue. We describe and evaluate a more flexible register management scheme - reference counting. We implement reference counting using a bit-matrix with a column for every physical register and a row for every entity that can hold a physical register, e.g., an in-flight instruction. Columns are NOR'ed together to create a bitvector free list from which registers are allocated using priority encoders. We describe reference counting designs that support micro-architectural techniques including register file power gating, dynamic register move elimination, register file checkpointing, and latency tolerant execution. Performance and circuit simulation show that the energy cost of reference counting is low and is easily recouped by the savings of the techniques it enables. © 2012 IEEE.

Duke Scholars

Published In

Proceedings - International Symposium on High-Performance Computer Architecture

DOI

ISSN

1530-0897

Publication Date

May 3, 2012

Start / End Page

273 / 284
 

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Battle, S., Hilton, A. D., Hempstead, M., & Roth, A. (2012). Flexible register management using reference counting. In Proceedings - International Symposium on High-Performance Computer Architecture (pp. 273–284). https://doi.org/10.1109/HPCA.2012.6169033
Battle, S., A. D. Hilton, M. Hempstead, and A. Roth. “Flexible register management using reference counting.” In Proceedings - International Symposium on High-Performance Computer Architecture, 273–84, 2012. https://doi.org/10.1109/HPCA.2012.6169033.
Battle S, Hilton AD, Hempstead M, Roth A. Flexible register management using reference counting. In: Proceedings - International Symposium on High-Performance Computer Architecture. 2012. p. 273–84.
Battle, S., et al. “Flexible register management using reference counting.” Proceedings - International Symposium on High-Performance Computer Architecture, 2012, pp. 273–84. Scopus, doi:10.1109/HPCA.2012.6169033.
Battle S, Hilton AD, Hempstead M, Roth A. Flexible register management using reference counting. Proceedings - International Symposium on High-Performance Computer Architecture. 2012. p. 273–284.

Published In

Proceedings - International Symposium on High-Performance Computer Architecture

DOI

ISSN

1530-0897

Publication Date

May 3, 2012

Start / End Page

273 / 284