Skip to main content

C-V MEASUREMENT AND SIMULATION OF SILICON-INSULATOR-SILICON (SIS) STRUCTURES FOR ANALYZING CHARGES IN BURIED OXIDES OF BONDED SOI MATERIALS

Publication ,  Journal Article
MITANI, K; MASSOUD, HZ
Published in: IEICE TRANSACTIONS ON ELECTRONICS
December 1992

Duke Scholars

Published In

IEICE TRANSACTIONS ON ELECTRONICS

EISSN

1745-1353

ISSN

0916-8524

Publication Date

December 1992

Volume

E75C

Issue

12

Start / End Page

1421 / 1429

Related Subject Headings

  • Electrical & Electronic Engineering
  • 4009 Electronics, sensors and digital hardware
 

Citation

APA
Chicago
ICMJE
MLA
NLM
MITANI, K., & MASSOUD, H. Z. (1992). C-V MEASUREMENT AND SIMULATION OF SILICON-INSULATOR-SILICON (SIS) STRUCTURES FOR ANALYZING CHARGES IN BURIED OXIDES OF BONDED SOI MATERIALS. IEICE TRANSACTIONS ON ELECTRONICS, E75C(12), 1421–1429.
MITANI, K., and H. Z. MASSOUD. “C-V MEASUREMENT AND SIMULATION OF SILICON-INSULATOR-SILICON (SIS) STRUCTURES FOR ANALYZING CHARGES IN BURIED OXIDES OF BONDED SOI MATERIALS.” IEICE TRANSACTIONS ON ELECTRONICS E75C, no. 12 (December 1992): 1421–29.
MITANI, K., and H. Z. MASSOUD. “C-V MEASUREMENT AND SIMULATION OF SILICON-INSULATOR-SILICON (SIS) STRUCTURES FOR ANALYZING CHARGES IN BURIED OXIDES OF BONDED SOI MATERIALS.” IEICE TRANSACTIONS ON ELECTRONICS, vol. E75C, no. 12, Dec. 1992, pp. 1421–29.

Published In

IEICE TRANSACTIONS ON ELECTRONICS

EISSN

1745-1353

ISSN

0916-8524

Publication Date

December 1992

Volume

E75C

Issue

12

Start / End Page

1421 / 1429

Related Subject Headings

  • Electrical & Electronic Engineering
  • 4009 Electronics, sensors and digital hardware