The Effect of Annealing Ambient on Dopant Diffusion in Silicon during Low-Temperature Processing

Annealing ambient effects on dopant diffusion in silicon were investigated during low-temperature processing. BF2, P, and As were implanted at room temperature in (100) silicon through a 140Å thick layer of SiO2 with the ion beam normal to the wafer surface, and the implant dose and energy sufficient to amorphize the surface layer. After low-temperature furnace annealing, ion-implanted B, P, and As in Si show a transient enhanced diffusion regime in both inert and oxidizing ambients. It was expected that point-defect generation during the annealing of implant damage would dominate the transient enhanced diffusion process regardless of the ambient. However, deeper P junctions were observed for implants annealed in an oxidizing ambient when the surface oxidation consumed more than 50Å of Si. We propose that stress in the surface layer plays an important role in the diffusion of high-dose P implants. The effect of oxidation is to consume this highly stressed surface layer which can suppress the P diffusion in the tail region. The role of the surface stress layer in P diffusion will be discussed and profile simulations using this model will be presented. © 1990, The Electrochemical Society, Inc. All rights reserved.

Duke Scholars

Author Hisham Z. Massoud Electrical and Computer Engineering

Author Richard B. Fair Electrical and Computer Engineering